This letter analyzes the impact of a phase-locked loop (PLL) on small-signal stability in a system of interconnected grid-forming and grid-following (GFL) converters.
This model elucidates the interplay between the GCC’s output impedance, the PLL-FCE and the grid impedance. It also unveils the impact of the PLL-FCE on system stability in weak grid scenarios.
By establishing a PLL model in weak power grids, it is found that line impedance, grid frequency disturbances, and output power all have an impact on PLL stability. The influence of line impedance, grid frequency disturbances, and output power on PLL is analyzed using the phase plane method.
Commonly, this stability problem (referred to as PLL-synchronization stability in this paper) was studied by employing a single-converter system connected to an infinite bus, which, however, omits the impacts of the power grid structure and the interactions among multiple converters.
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